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In these two equations, multiply through the rst equation by R and the second by R, then add the two together to get R 1=2 ohm, answer. 53. Figure 56 is of the form of Fig. 55, and thus eq. (63) applies. Let us agree to number the branches from 1 through 5, from left to right in Fig. 56. The rst step is to convert ohms to mhos, using the de nition of eq. (58). Doing this, and noting that, in Fig. 56, V2 V5 0, eq. (63) becomes Vo 0:08333 15 0:06666 22 0:11111 12 0:08333 0:12500 0:06666 0:11111 0:10000 4:04979 8:33102 volts; answer: 0:48611

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The average models are therefore useful for simulations such as conducted susceptibility, openloop phase gain, output impedance, and input impedance The major drawback is that time domain information, such as ripple, spikes, gate charge, and instantaneous switching loss, is not available The generalized solution is to use the correct model depending on the behavior you want to investigate Table 41 provides some assistance Both models may be used during the development of a product and the ensuing worst-case tolerance analysis Examples of both methods are shown in this chapter Average Modeling Example As an example of average modeling, let us consider a simple buck regulator circuit In order to keep the example simple, we will assume that we are using voltage mode control Voltage mode control was popular when pulse width modulator ICs, such as the SG1524, were rst.

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The docs directory, which must hold all project documentation including: A design decision document named designChoices.txt, an ASCII text file

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54. We would not have V4 12 volts, and upon making this change in the above solution to problem 53 we nd that Vo 1:38315 2:84534 volts; answer: 0:48611

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55. The rst step is to draw the Thevenin equivalent generator for Fig. 56. To do this, imagine that we are at the right-hand side of Fig. 56, looking to the left at the 10-ohm resistance. Then, from the solution to problem 53, we have Vo Vg 8:33102 volts; and Rg 1=0:48611 2:05715 ohms and thus, by Thevenin s theorem, we now have the simple series circuit condition shown as follows.

FIGURE 17-1

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Simulation Strategies for Some Typical Power Supply Analysis [8] Strategy Transient Models Accelerate startup by reducing soft-start time constant, if applicable. Use average model transient results as a road map. Transient Models Initialize close to steady state average DC results. Only initialize largest time constants like output lter L and C, or compensation capacitors. Transient Models Initialize circuit, then dynamically short output with voltage-controlled switch. Average Models Disable UVLO for correct DC results. Do not initialize circuit. Allow natural DC solution, then run transient analysis using source or switch to cause line or load transient. Transient Models Initialize circuit for steady state, then short output with a switch. Average Models Allow natural DC solution. Do not use initial conditions. Split feedback loop using a large inductor (blocks AC), then couple AC source signal to input side with a large capacitor. Average or Transient Models Drive the power stage using a voltage source with a xed duty cycle. Controller with feedback is not necessary.

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